Digital Verification Eng. - DDR/LPDDR IF Protocols
Set up, and debug functional verification environments across multiple design blocks and subsystem levels. - Verify, confirm and report on expected…
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Set up, and debug functional verification environments across multiple design blocks and subsystem levels. - Verify, confirm and report on expected…
Architect, set up, and debug functional verification environments across multiple design blocks and subsystem levels. - Serve as the protocol expert,…
Build and debug functional verification environments at IP and subsystem levels. - Serve as the protocol expert, providing clarity on expected…
Own the verification strategy for a 4-Core coherent system - Write the verification plan: what is checked where, by whom, and how we know we are…
Integrate multiple subsystems (CPU clusters, memory, accelerators, peripherals and third-party IP) into the SoC top-level RTL . - Connect subsystems…
Own the SoC top-level RTL and lead the integration of CPU clusters, subsystems and third-party IP into the SoC top. …
senior HPC industry talent to lead that transition in the DACH region. THE OPPORTUNITY Germany is home to Europe's most influential HPC centres (the…
Bring-up execution: Own the power-on sequence, voltage and clock checks, reset and boot flow, and the first interface links to train. Write and…
Schematic capture & ownership: Own the full schematic for assigned boards — architecture, block partitioning, interface definition, power tree and…
Security Documentation: Document our platform's hardware security specification and support regulatory and certification compliance efforts. -…
Analysis & modelling: Build detailed and compact thermal models of die, package and board. Run CFD and conjugate heat transfer studies for cold…
Package & socket mechanics: Define bolster plate, stiffener and retention schemes that hold bond line and interface pressure across warpage and…
Build and maintain the integrated NPI readiness schedule, critical path and cross-functional dependencies. • Map the end-to-end NPI process: stages,…
organization, contributing to the company-wide initiative to advance AI-powered verification methodology. This position requires a rigorous,…
Define and own the LSU verification plan: functional coverage, testplan, checkers, and closure criteria - Build/extend UVM testbench components for…
lead, you will play a key role in ensuring functional correctness and low-power intent integrity across the design lifecycle. You will be responsible…
Architect, set up, and debug functional verification environments across multiple design blocks and subsystem levels. - Serve as the protocol expert,…
Set up, run, and debug gate-level simulations (GLS) for functional, timing (SDF back-annotated), and low-power verification across multiple design…
Education and experience - Bachelor's degree in Business Administration, Supply Chain Management, Finance, or Economics; a Master's or specialized…
a Senior Project Manager to bring structure, visibility and momentum to all of it. You'll be the connective tissue of our engineering organization:…
SOC Full Chip Verification Infrastructure - Define and establish the verification infrastructure, environment. - Develop and implement generic…
Lead, you will play a key role in ensuring low-power intent integrity across the design lifecycle. You will be responsible for VCLP signoff, ensuring…
1. Logic Synthesis & PPA Optimization ● Perform physical-aware RTL-to-gate synthesis for complex digital designs. ● Optimize synthesis results for…
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Telecom Products Cloud Company Job Description Strong Advanced Java. Strong architectural knowledge of RDBMS (Oracle/DB2/MySQL). Hands on Designed…
Department: Hardware Engineering Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By…
Department: Hardware ABOUT FRACTILE Fractile was founded in 2022 on the bet that, eventually, the world’s most capable AI systems would be limited in…
up, we’re transforming how devices connect, communicate, and operate through our ground-breaking Digital RF technology. Our mission goes beyond…
a Technical Lead to build and operate our Executive Support program. This Austin-based role combines hands-on technology support for senior…
a Design Verification Engineer responsible for verifying RTL designs for FPGA and ASIC-based products. The role focuses on ensuring that system-level…
We are seeking a highly skilled and experienced validation engineer for building a new system validation capacity within our MCU Validation team in …
We are moving from prototype to production across several chip programs, and we are growing a small, high-impact Supply Chain and Operations team to…
EnCharge AI is looking for a highly motivated and experienced Staff Physical Design Engineer to drive the physical implementation of our…
Intern, supporting the development and validation of our AIPU (AI Processing Unit) boards. You will work alongside hardware, test and …
We're looking for an experienced Administrative Operations Lead to oversee and coordinate the day-to-day operations of our US organization. This role…
a Solution Architect to own the technical and behavioral definition of our BIOS/UEFI firmware stack as it aligns to Open Compute Project (OCP)…